The development of high density memory devices in integrated circuits has lead to increasingly smaller dimensions between devices and between components of devices included within such circuits. Conventional production of short channel MOS transistors is accomplished by numerous photomask steps of increasing complexity. Many of these steps are required to control implantation of the diffusion regions adjacent the controlling gates in such transistors. Implant technology has also led to use of lightly-doped diffusion regions and halo implants designed to reduce transistor short channels effects.
The present method was designed to reduce the number of mask steps required to produce CMOS transistors, while assuring operational integrity in short channel transistors.
In the production of most CMOS devices, the N-channel transistors and P-channel transistors are constructed in an alternating sequence of steps where both gates are first formed and the associated diffusion regions are then implanted to complete the basic complementary devices.
To reduce the number of masking steps involved in such production techniques, split-poly procedures have been developed wherein the differing transistors are processed separately. A first gate is formed from a layer of polysilicon, which temporarily masks the area in which the complementary transistors is to be later formed. The substrate is then implanted adjacent to the first gate. The complementary gate is then formed. The resist used in its formation temporarily covers the area of the completed transistor during implantation of the second transistor area on the supporting substrate.
As implanting dimensions have become smaller, it has become more difficult to control the area of implantation in such transistors, particularly during the implanting of the second set of transistors in the complementary pairs of transistors required in CMOS transistor production. The present invention was designed to assure that implantation of the second set of transistors would not affect the previously-implanted transistors.